349 lines
14 KiB
Plaintext
349 lines
14 KiB
Plaintext
/**
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* Copyright (C) 2019 Corey Vixie
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*/
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/am33xx.h>
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#include <dt-bindings/board/am335x-bbw-bbb-base.h>
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/ {
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compatible = "ti,beaglebone", "ti,beaglebone-black", "ti,beaglebone-green";
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/* ID */
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part-number = "VE-2IN-LCD";
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version = "00A0";
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/* Reserved Pins */
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exclusive-use =
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/* TIED LOW / GND : Blue 5 (LSB) */
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"P8.45", /* LCD_DATA0 : Blue 4 */
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"P8.46", /* LCD_DATA1 : Blue 3 */
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"P8.43", /* LCD_DATA2 : Blue 2 */
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"P8.44", /* LCD_DATA3 : Blue 1 */
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"P8.41", /* LCD_DATA4 : Blue 0 (MSB) */
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"P8.42", /* LCD_DATA5 : Green 5 (LSB) */
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"P8.39", /* LCD_DATA6 : Green 4 */
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"P8.40", /* LCD_DATA7 : Green 3 */
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"P8.37", /* LCD_DATA8 : Green 2 */
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"P8.38", /* LCD_DATA9 : Green 1 */
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"P8.36", /* LCD_DATA10 : Green 0 (MSB) */
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/* TIED LOW / GND : Red 5 (LSB) */
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"P8.34", /* LCD_DATA11 : Red 4 */
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"P8.35", /* LCD_DATA12 : Red 3 */
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"P8.33", /* LCD_DATA13 : Red 2 */
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"P8.31", /* LCD_DATA14 : Red 1 */
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"P8.32", /* LCD_DATA15 : Red 0 (MSB) */
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"P8.15", /* gpmc_ad15.lcd_data16 */
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"P8.16", /* gpmc_ad14.lcd_data17 */
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"P8.11", /* gpmc_ad13.lcd_data18 */
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"P8.12", /* gpmc_ad12.lcd_data19 */
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"P8.17", /* gpmc_ad11.lcd_data20 */
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"P8.14", /* gpmc_ad10.lcd_data21 */
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"P8.13", /* gpmc_ad9.lcd_data22 */
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"P8.19", /* gpmc_ad8.lcd_data23 */
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"P8.27", /* lcd: LCD_VSYNC : Vertical Sync*/
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"P8.29", /* lcd: LCD_HSYNC : Horizontal Sync */
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"P8.28", /* lcd: LCD_PCLK : Pixel Clock*/
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"P8.30", /* lcd: LCD_AC_BIAS_EN : Used for Display Enable (DE) */
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"P9.14", /* EHRPWM1A: LED Backlight Anode */
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"lcd",
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"ehrpwm1a";
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/* Free all reserved pins from pinmux helpers to ensure they're available */
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fragment@0 {
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target = <&ocp>;
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__overlay__ {
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P9_14_pinmux { status = "disabled"; };
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P8_45_pinmux { status = "disabled"; };
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P8_46_pinmux { status = "disabled"; };
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P8_43_pinmux { status = "disabled"; };
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P8_44_pinmux { status = "disabled"; };
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P8_41_pinmux { status = "disabled"; };
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P8_42_pinmux { status = "disabled"; };
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P8_39_pinmux { status = "disabled"; };
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P8_40_pinmux { status = "disabled"; };
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P8_37_pinmux { status = "disabled"; };
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P8_38_pinmux { status = "disabled"; };
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P8_36_pinmux { status = "disabled"; };
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P8_34_pinmux { status = "disabled"; };
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P8_35_pinmux { status = "disabled"; };
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P8_33_pinmux { status = "disabled"; };
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P8_31_pinmux { status = "disabled"; };
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P8_32_pinmux { status = "disabled"; };
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P8_15_pinmux { status = "disabled"; }; /* gpmc_ad15.lcd_data16 */
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P8_16_pinmux { status = "disabled"; }; /* gpmc_ad14.lcd_data17 */
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P8_11_pinmux { status = "disabled"; }; /* gpmc_ad13.lcd_data18 */
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P8_12_pinmux { status = "disabled"; }; /* gpmc_ad12.lcd_data19 */
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P8_17_pinmux { status = "disabled"; }; /* gpmc_ad11.lcd_data20 */
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P8_14_pinmux { status = "disabled"; }; /* gpmc_ad10.lcd_data21 */
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P8_13_pinmux { status = "disabled"; }; /* gpmc_ad9.lcd_data22 */
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P8_19_pinmux { status = "disabled"; }; /* gpmc_ad8.lcd_data23 */
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P8_27_pinmux { status = "disabled"; };
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P8_29_pinmux { status = "disabled"; };
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P8_28_pinmux { status = "disabled"; };
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P8_30_pinmux { status = "disabled"; };
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};
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};
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/* Assign LCDC pins - Everything is MODE0 output */
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fragment@1 {
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target = <&am33xx_pinmux>;
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__overlay__ {
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pwm_bl_pins: pinmux_pwm_bl_pins {
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pinctrl-single,pins = <
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BONE_P9_14 (PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* P9_14: gpmc_a2.ehrpwm1a */
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>;
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};
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spi0_pins_s0: pinmux_spi0_pins_s0 {
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pinctrl-single,pins = <
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0x150 0x30 /* SPI0_SCLK | MODE0 | INPUT_PULLUP */
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0x154 0x30 /* SPI0_D0 | MODE0 | INPUT_PULLUP */
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0x158 0x10 /* SPI0_D1 | MODE0 | OUTPUT_PULLUP */
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0x15c 0x10 /* SPI0_CS0 | MODE0 | OUTPUT_PULLUP */
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>;
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};
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ve_lcd_pins: pinmux_ve_lcd_pins {
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pinctrl-single,pins = <
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BONE_P8_45 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA0 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
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BONE_P8_46 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA1 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
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BONE_P8_43 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA2 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
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BONE_P8_44 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA3 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
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BONE_P8_41 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA4 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
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BONE_P8_42 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA5 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
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BONE_P8_39 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA6 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
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BONE_P8_40 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA7 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
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BONE_P8_37 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA8 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
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BONE_P8_38 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA9 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
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BONE_P8_36 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA10 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
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BONE_P8_34 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA11 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
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BONE_P8_35 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA12 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
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BONE_P8_33 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA13 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
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BONE_P8_31 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA14 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
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BONE_P8_32 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA15 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
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BONE_P8_15 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad15.lcd_data16 */
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BONE_P8_16 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad14.lcd_data17 */
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BONE_P8_11 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad13.lcd_data18 */
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BONE_P8_12 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad12.lcd_data19 */
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BONE_P8_17 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad11.lcd_data20 */
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BONE_P8_14 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad10.lcd_data21 */
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BONE_P8_13 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad9.lcd_data22 */
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BONE_P8_19 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad8.lcd_data23 */
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BONE_P8_27 (PIN_OUTPUT | MUX_MODE0) /* LCD_VSYNC | MODE0 | AM33XX_PIN_OUTPUT */
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BONE_P8_29 (PIN_OUTPUT | MUX_MODE0) /* LCD_HSYNC | MODE0 | AM33XX_PIN_OUTPUT */
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BONE_P8_28 (PIN_OUTPUT | MUX_MODE0) /* LCD_PCLK | MODE0 | AM33XX_PIN_OUTPUT */
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BONE_P8_30 (PIN_OUTPUT | MUX_MODE0) /* LCD_AC_BIAS_EN | MODE0 | AM33XX_PIN_OUTPUT */
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>;
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};
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};
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};
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fragment@2 {
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target = <&spi0>;
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__overlay__ {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_pins_s0>;
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spidev@0 {
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spi-max-frequency = <24000000>;
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reg = <0>;
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compatible = "linux,spidev";
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};
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};
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};
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fragment@3 {
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target = <&lcdc>;
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__overlay__ {
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status = "okay";
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blue-and-red-wiring = "crossed";
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};
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};
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fragment@4 {
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target = <&epwmss1>;
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__overlay__ {
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status = "okay";
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};
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};
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fragment@5 {
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target = <&ehrpwm1>;
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__overlay__ {
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pinctrl-names = "default";
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pinctrl-0 = <&pwm_bl_pins>;
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status = "okay";
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};
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};
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fragment@6 {
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target-path = "/";
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__overlay__ {
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/* avoid stupid warning */
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#address-cells = <1>;
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#size-cells = <1>;
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// backlight {
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// status = "okay";
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// compatible = "pwm-backlight";
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// pwms = <&ehrpwm1 0 250000 0>;
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// brightness-levels = <
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// 0 1 2 3 4 5 6 7 8 9
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// 10 11 12 13 14 15 16 17 18 19
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// 20 21 22 23 24 25 26 27 28 29
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// 30 31 32 33 34 35 36 37 38 39
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// 40 41 42 43 44 45 46 47 48 49
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// 50 51 52 53 54 55 56 57 58 59
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// 60 61 62 63 64 65 66 67 68 69
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// 70 71 72 73 74 75 76 77 78 79
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// 80 81 82 83 84 85 86 87 88 89
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// 90 91 92 93 94 95 96 97 98 99
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// 100
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// >;
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// default-brightness-level = <100>;
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// };
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panel {
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status = "okay";
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compatible = "tilcdc,panel";
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pinctrl-names = "default";
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pinctrl-0 = <&ve_lcd_pins>;
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panel-info {
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ac-bias = <255>; // AC Bias Pin Frequency
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ac-bias-intrpt = <0>; // AC Bias Pin Transitions per Interrupt
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dma-burst-sz = <16>; // DMA burst size
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bpp = <16>; // Bits per pixel (Use 24bpp for 18-bit LCDs)
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fdd = <0x80>; // FIFO DMA Request Delay
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sync-edge = <1>; // Horizontal and Vertical Sync Edge: 0=rising 1=falling
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sync-ctrl = <1>; // Horizontal and Vertical Sync: Control: 0=ignore
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raster-order = <0>; // Raster Data Order Select: 1=Most-to-least 0=Least-to-most
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fifo-th = <0>; // DMA FIFO threshold
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enable-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
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// tft-alt-mode = <0>;
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// stn-565-mode = <0>;
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// mono-8bit-mode = <0>;
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// invert-pxl-clk; // WRONG, DON'T USE
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};
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// typical videomode of lcd panel. Multiple video modes
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// can be listed if the panel supports multiple timings, but the 'native-mode'
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// should be the preferred/default resolution. Refer to
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// Documentation/devicetree/bindings/display/panel/display-timing.txt for display
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// timing binding details.
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display-timings {
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native-mode = <&timing0>;
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timing0: 480x480_TDO {
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// clock-frequency = <8000000>; // 30fps
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clock-frequency = <16000000>; // 60fps
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hactive = <480>;
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vactive = <480>;
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hfront-porch = <24>; //Min: 1; Max: ?; Clock cycles.
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hsync-len = <6>; //Min: 1; Max: 255; Clock cycles.
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hback-porch = <18>; //Min: 1; Max: 255; Clock cycles.
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vfront-porch = <16>; //Min: 2; Max: ?; Lines.
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vsync-len = <4>; //Min: 1; Max: 254; Lines.
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vback-porch = <10>; //Min: 1; Max: 254; Lines.
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <1>;
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pixelclk-active = <1>;
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};
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timing1: linux_kernel {
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clock-frequency = <27500000>; // 60fps
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hactive = <480>;
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vactive = <854>;
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hfront-porch = <38>;
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hsync-len = <12>;
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hback-porch = <12>;
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vfront-porch = <18>;
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vsync-len = <8>;
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vback-porch = <4>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <1>;
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pixelclk-active = <1>;
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};
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timing3: 480x480_CVT {
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clock-frequency = <17000000>; // 60fps
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hactive = <480>;
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vactive = <480>;
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hfront-porch = <8>;
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hsync-len = <48>;
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hback-porch = <56>;
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vfront-porch = <1>;
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vsync-len = <3>;
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vback-porch = <13>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <1>;
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pixelclk-active = <1>;
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};
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timing4: 640x480_CVT_RB {
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clock-frequency = <23500000>; // 60fps
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hactive = <640>;
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vactive = <480>;
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hfront-porch = <8>;
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hsync-len = <32>;
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hback-porch = <40>;
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vfront-porch = <14>;
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vsync-len = <3>;
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vback-porch = <4>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <1>;
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pixelclk-active = <1>;
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};
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};
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};
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fb {
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compatible = "ti,am33xx-tilcdc";
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reg = <0x4830e000 0x1000>;
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interrupt-parent = <&intc>;
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interrupts = <36>;
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ti,hwmods = "lcdc";
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ti,allow-non-reduced-blanking-modes;
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};
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};
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};
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};
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