/** * Copyright (C) 2019 Corey Vixie */ /dts-v1/; /plugin/; #include #include #include / { compatible = "ti,beaglebone", "ti,beaglebone-black", "ti,beaglebone-green"; /* ID */ part-number = "VE-2IN-LCD"; version = "00A0"; /* Reserved Pins */ exclusive-use = /* TIED LOW / GND : Blue 5 (LSB) */ "P8.45", /* LCD_DATA0 : Blue 4 */ "P8.46", /* LCD_DATA1 : Blue 3 */ "P8.43", /* LCD_DATA2 : Blue 2 */ "P8.44", /* LCD_DATA3 : Blue 1 */ "P8.41", /* LCD_DATA4 : Blue 0 (MSB) */ "P8.42", /* LCD_DATA5 : Green 5 (LSB) */ "P8.39", /* LCD_DATA6 : Green 4 */ "P8.40", /* LCD_DATA7 : Green 3 */ "P8.37", /* LCD_DATA8 : Green 2 */ "P8.38", /* LCD_DATA9 : Green 1 */ "P8.36", /* LCD_DATA10 : Green 0 (MSB) */ /* TIED LOW / GND : Red 5 (LSB) */ "P8.34", /* LCD_DATA11 : Red 4 */ "P8.35", /* LCD_DATA12 : Red 3 */ "P8.33", /* LCD_DATA13 : Red 2 */ "P8.31", /* LCD_DATA14 : Red 1 */ "P8.32", /* LCD_DATA15 : Red 0 (MSB) */ "P8.15", /* gpmc_ad15.lcd_data16 */ "P8.16", /* gpmc_ad14.lcd_data17 */ "P8.11", /* gpmc_ad13.lcd_data18 */ "P8.12", /* gpmc_ad12.lcd_data19 */ "P8.17", /* gpmc_ad11.lcd_data20 */ "P8.14", /* gpmc_ad10.lcd_data21 */ "P8.13", /* gpmc_ad9.lcd_data22 */ "P8.19", /* gpmc_ad8.lcd_data23 */ "P8.27", /* lcd: LCD_VSYNC : Vertical Sync*/ "P8.29", /* lcd: LCD_HSYNC : Horizontal Sync */ "P8.28", /* lcd: LCD_PCLK : Pixel Clock*/ "P8.30", /* lcd: LCD_AC_BIAS_EN : Used for Display Enable (DE) */ "P9.14", /* EHRPWM1A: LED Backlight Anode */ "lcd", "ehrpwm1a"; /* Free all reserved pins from pinmux helpers to ensure they're available */ fragment@0 { target = <&ocp>; __overlay__ { P9_14_pinmux { status = "disabled"; }; P8_45_pinmux { status = "disabled"; }; P8_46_pinmux { status = "disabled"; }; P8_43_pinmux { status = "disabled"; }; P8_44_pinmux { status = "disabled"; }; P8_41_pinmux { status = "disabled"; }; P8_42_pinmux { status = "disabled"; }; P8_39_pinmux { status = "disabled"; }; P8_40_pinmux { status = "disabled"; }; P8_37_pinmux { status = "disabled"; }; P8_38_pinmux { status = "disabled"; }; P8_36_pinmux { status = "disabled"; }; P8_34_pinmux { status = "disabled"; }; P8_35_pinmux { status = "disabled"; }; P8_33_pinmux { status = "disabled"; }; P8_31_pinmux { status = "disabled"; }; P8_32_pinmux { status = "disabled"; }; P8_15_pinmux { status = "disabled"; }; /* gpmc_ad15.lcd_data16 */ P8_16_pinmux { status = "disabled"; }; /* gpmc_ad14.lcd_data17 */ P8_11_pinmux { status = "disabled"; }; /* gpmc_ad13.lcd_data18 */ P8_12_pinmux { status = "disabled"; }; /* gpmc_ad12.lcd_data19 */ P8_17_pinmux { status = "disabled"; }; /* gpmc_ad11.lcd_data20 */ P8_14_pinmux { status = "disabled"; }; /* gpmc_ad10.lcd_data21 */ P8_13_pinmux { status = "disabled"; }; /* gpmc_ad9.lcd_data22 */ P8_19_pinmux { status = "disabled"; }; /* gpmc_ad8.lcd_data23 */ P8_27_pinmux { status = "disabled"; }; P8_29_pinmux { status = "disabled"; }; P8_28_pinmux { status = "disabled"; }; P8_30_pinmux { status = "disabled"; }; }; }; /* Assign LCDC pins - Everything is MODE0 output */ fragment@1 { target = <&am33xx_pinmux>; __overlay__ { pwm_bl_pins: pinmux_pwm_bl_pins { pinctrl-single,pins = < BONE_P9_14 (PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* P9_14: gpmc_a2.ehrpwm1a */ >; }; spi0_pins_s0: pinmux_spi0_pins_s0 { pinctrl-single,pins = < 0x150 0x30 /* SPI0_SCLK | MODE0 | INPUT_PULLUP */ 0x154 0x30 /* SPI0_D0 | MODE0 | INPUT_PULLUP */ 0x158 0x10 /* SPI0_D1 | MODE0 | OUTPUT_PULLUP */ 0x15c 0x10 /* SPI0_CS0 | MODE0 | OUTPUT_PULLUP */ >; }; ve_lcd_pins: pinmux_ve_lcd_pins { pinctrl-single,pins = < BONE_P8_45 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA0 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ BONE_P8_46 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA1 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ BONE_P8_43 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA2 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ BONE_P8_44 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA3 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ BONE_P8_41 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA4 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ BONE_P8_42 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA5 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ BONE_P8_39 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA6 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ BONE_P8_40 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA7 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ BONE_P8_37 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA8 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ BONE_P8_38 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA9 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ BONE_P8_36 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA10 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ BONE_P8_34 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA11 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ BONE_P8_35 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA12 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ BONE_P8_33 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA13 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ BONE_P8_31 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA14 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ BONE_P8_32 (PIN_OUTPUT | MUX_MODE0) /* LCD_DATA15 | MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ BONE_P8_15 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad15.lcd_data16 */ BONE_P8_16 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad14.lcd_data17 */ BONE_P8_11 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad13.lcd_data18 */ BONE_P8_12 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad12.lcd_data19 */ BONE_P8_17 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad11.lcd_data20 */ BONE_P8_14 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad10.lcd_data21 */ BONE_P8_13 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad9.lcd_data22 */ BONE_P8_19 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad8.lcd_data23 */ BONE_P8_27 (PIN_OUTPUT | MUX_MODE0) /* LCD_VSYNC | MODE0 | AM33XX_PIN_OUTPUT */ BONE_P8_29 (PIN_OUTPUT | MUX_MODE0) /* LCD_HSYNC | MODE0 | AM33XX_PIN_OUTPUT */ BONE_P8_28 (PIN_OUTPUT | MUX_MODE0) /* LCD_PCLK | MODE0 | AM33XX_PIN_OUTPUT */ BONE_P8_30 (PIN_OUTPUT | MUX_MODE0) /* LCD_AC_BIAS_EN | MODE0 | AM33XX_PIN_OUTPUT */ >; }; }; }; fragment@2 { target = <&spi0>; __overlay__ { #address-cells = <1>; #size-cells = <0>; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&spi0_pins_s0>; spidev@0 { spi-max-frequency = <24000000>; reg = <0>; compatible = "linux,spidev"; }; }; }; fragment@3 { target = <&lcdc>; __overlay__ { status = "okay"; blue-and-red-wiring = "crossed"; }; }; fragment@4 { target = <&epwmss1>; __overlay__ { status = "okay"; }; }; fragment@5 { target = <&ehrpwm1>; __overlay__ { pinctrl-names = "default"; pinctrl-0 = <&pwm_bl_pins>; status = "okay"; }; }; fragment@6 { target-path = "/"; __overlay__ { /* avoid stupid warning */ #address-cells = <1>; #size-cells = <1>; // backlight { // status = "okay"; // compatible = "pwm-backlight"; // pwms = <&ehrpwm1 0 250000 0>; // brightness-levels = < // 0 1 2 3 4 5 6 7 8 9 // 10 11 12 13 14 15 16 17 18 19 // 20 21 22 23 24 25 26 27 28 29 // 30 31 32 33 34 35 36 37 38 39 // 40 41 42 43 44 45 46 47 48 49 // 50 51 52 53 54 55 56 57 58 59 // 60 61 62 63 64 65 66 67 68 69 // 70 71 72 73 74 75 76 77 78 79 // 80 81 82 83 84 85 86 87 88 89 // 90 91 92 93 94 95 96 97 98 99 // 100 // >; // default-brightness-level = <100>; // }; panel { status = "okay"; compatible = "tilcdc,panel"; pinctrl-names = "default"; pinctrl-0 = <&ve_lcd_pins>; panel-info { ac-bias = <255>; // AC Bias Pin Frequency ac-bias-intrpt = <0>; // AC Bias Pin Transitions per Interrupt dma-burst-sz = <16>; // DMA burst size bpp = <16>; // Bits per pixel (Use 24bpp for 18-bit LCDs) fdd = <0x80>; // FIFO DMA Request Delay sync-edge = <1>; // Horizontal and Vertical Sync Edge: 0=rising 1=falling sync-ctrl = <1>; // Horizontal and Vertical Sync: Control: 0=ignore raster-order = <0>; // Raster Data Order Select: 1=Most-to-least 0=Least-to-most fifo-th = <0>; // DMA FIFO threshold enable-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; // tft-alt-mode = <0>; // stn-565-mode = <0>; // mono-8bit-mode = <0>; // invert-pxl-clk; // WRONG, DON'T USE }; // typical videomode of lcd panel. Multiple video modes // can be listed if the panel supports multiple timings, but the 'native-mode' // should be the preferred/default resolution. Refer to // Documentation/devicetree/bindings/display/panel/display-timing.txt for display // timing binding details. display-timings { native-mode = <&timing0>; timing0: 480x480_TDO { // clock-frequency = <8000000>; // 30fps clock-frequency = <16000000>; // 60fps hactive = <480>; vactive = <480>; hfront-porch = <24>; //Min: 1; Max: ?; Clock cycles. hsync-len = <6>; //Min: 1; Max: 255; Clock cycles. hback-porch = <18>; //Min: 1; Max: 255; Clock cycles. vfront-porch = <16>; //Min: 2; Max: ?; Lines. vsync-len = <4>; //Min: 1; Max: 254; Lines. vback-porch = <10>; //Min: 1; Max: 254; Lines. hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <1>; }; timing1: linux_kernel { clock-frequency = <27500000>; // 60fps hactive = <480>; vactive = <854>; hfront-porch = <38>; hsync-len = <12>; hback-porch = <12>; vfront-porch = <18>; vsync-len = <8>; vback-porch = <4>; hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <1>; }; timing3: 480x480_CVT { clock-frequency = <17000000>; // 60fps hactive = <480>; vactive = <480>; hfront-porch = <8>; hsync-len = <48>; hback-porch = <56>; vfront-porch = <1>; vsync-len = <3>; vback-porch = <13>; hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <1>; }; timing4: 640x480_CVT_RB { clock-frequency = <23500000>; // 60fps hactive = <640>; vactive = <480>; hfront-porch = <8>; hsync-len = <32>; hback-porch = <40>; vfront-porch = <14>; vsync-len = <3>; vback-porch = <4>; hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <1>; }; }; }; fb { compatible = "ti,am33xx-tilcdc"; reg = <0x4830e000 0x1000>; interrupt-parent = <&intc>; interrupts = <36>; ti,hwmods = "lcdc"; ti,allow-non-reduced-blanking-modes; }; }; }; };