mirror of
https://github.com/YikeStone/MT7601u.git
synced 2025-08-03 19:34:08 +05:30
634 lines
13 KiB
C
634 lines
13 KiB
C
/*
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*/
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#include "rt_config.h"
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//#ifdef RTMP_MAC
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#if defined(RTMP_MAC) || defined(MT7601)
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/* BBP register initialization set*/
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REG_PAIR BBPRegTable[] = {
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{BBP_R65, 0x2C}, /* fix rssi issue*/
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{BBP_R66, 0x38}, /* Also set this default value to pAd->BbpTuning.R66CurrentValue at initial*/
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{BBP_R68, 0x0B}, /* improve Rx sensitivity. */
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{BBP_R69, 0x12},
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{BBP_R70, 0xa}, /* BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa*/
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{BBP_R73, 0x10},
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{BBP_R81, 0x37},
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{BBP_R82, 0x62},
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{BBP_R83, 0x6A},
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{BBP_R84, 0x99}, /* 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before*/
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{BBP_R86, 0x00}, /* middle range issue, Rory @2008-01-28 */
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{BBP_R91, 0x04}, /* middle range issue, Rory @2008-01-28*/
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{BBP_R92, 0x00}, /* middle range issue, Rory @2008-01-28*/
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{BBP_R103, 0x00}, /* near range high-power issue, requested from Gary @2008-0528*/
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{BBP_R105, 0x05}, /* 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.*/
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#ifdef DOT11_N_SUPPORT
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{BBP_R106, 0x35}, /* Optimizing the Short GI sampling request from Gray @2009-0409*/
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#endif /* DOT11_N_SUPPORT */
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};
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#define NUM_BBP_REG_PARMS (sizeof(BBPRegTable) / sizeof(REG_PAIR))
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NDIS_STATUS NICInitBBP(RTMP_ADAPTER *pAd)
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{
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INT Index = 0;
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UCHAR R0 = 0xff;
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/* Read BBP register, make sure BBP is up and running before write new data*/
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if (rtmp_bbp_is_ready(pAd)== FALSE)
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return NDIS_STATUS_FAILURE;
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Index = 0;
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/* Initialize BBP register to default value*/
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for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
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{
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#ifdef MICROWAVE_OVEN_SUPPORT
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#ifdef MT7601
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if ( BBPRegTable[Index].Register == BBP_R65)
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{
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/* Backup BBP_R65 and B5.R6 and B5.R7 */
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pAd->CommonCfg.MO_Cfg.Stored_BBP_R65 = BBPRegTable[Index].Value;
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DBGPRINT(RT_DEBUG_TRACE, ("Stored_BBP_R65=%x @%s \n", pAd->CommonCfg.MO_Cfg.Stored_BBP_R65, __FUNCTION__));
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}
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#endif /* MT7601 */
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#endif /* MICROWAVE_OVEN_SUPPORT */
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RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd,
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BBPRegTable[Index].Register,
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BBPRegTable[Index].Value);
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}
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/* re-config specific BBP registers for individual chip */
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if (pAd->chipCap.pBBPRegTable)
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{
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REG_PAIR *pbbpRegTb = pAd->chipCap.pBBPRegTable;
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for (Index = 0; Index < pAd->chipCap.bbpRegTbSize; Index++)
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{
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RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd,
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pbbpRegTb[Index].Register,
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pbbpRegTb[Index].Value);
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DBGPRINT(RT_DEBUG_TRACE, ("BBP_R%d=0x%x\n",
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pbbpRegTb[Index].Register,
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pbbpRegTb[Index].Value));
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}
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}
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if (pAd->chipOps.AsicBbpInit != NULL)
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pAd->chipOps.AsicBbpInit(pAd);
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/*
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For rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
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RT3090 should not program BBP R84 to 0x19, otherwise TX will block.
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3070/71/72,3090,3090A( are included in RT30xx),3572,3390
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*/
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if (((pAd->MACVersion & 0xffff) != 0x0101) &&
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!(IS_RT30xx(pAd)|| IS_RT3572(pAd) || IS_RT5390(pAd) || IS_RT5392(pAd) || IS_RT3290(pAd) || IS_MT7601(pAd)))
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RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
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if (pAd->MACVersion == 0x28600100)
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{
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RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
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RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
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}
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return NDIS_STATUS_SUCCESS;
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}
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INT rtmp_bbp_set_txdac(struct _RTMP_ADAPTER *pAd, INT tx_dac)
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{
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UCHAR val, old_val = 0;
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RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &old_val);
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val = old_val & (~0x18);
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switch (tx_dac)
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{
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case 2:
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val |= 0x10;
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break;
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case 1:
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val |= 0x08;
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break;
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case 0:
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default:
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break;
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}
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if (val != old_val) {
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RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, val);
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}
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return TRUE;
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}
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INT rtmp_bbp_set_rxpath(struct _RTMP_ADAPTER *pAd, INT rxpath)
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{
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UCHAR val = 0;
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RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &val);
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val &= (~0x18);
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if(rxpath == 3)
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val |= (0x10);
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else if(rxpath == 2)
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val |= (0x8);
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else if(rxpath == 1)
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val |= (0x0);
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RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, val);
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#ifdef CONFIG_STA_SUPPORT
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#endif /* CONFIG_STA_SUPPORT */
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return TRUE;
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}
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INT rtmp_bbp_set_ctrlch(struct _RTMP_ADAPTER *pAd, INT ext_ch)
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{
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UCHAR val, old_val = 0;
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RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &old_val);
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val = old_val;
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switch (ext_ch)
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{
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case EXTCHA_BELOW:
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val |= (0x20);
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break;
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case EXTCHA_ABOVE:
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case EXTCHA_NONE:
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val &= (~0x20);
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break;
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}
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if (val != old_val)
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RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, val);
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#ifdef CONFIG_STA_SUPPORT
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#endif /* CONFIG_STA_SUPPORT */
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return TRUE;
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}
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INT rtmp_bbp_set_bw(struct _RTMP_ADAPTER *pAd, INT bw)
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{
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UCHAR val, old_val = 0;
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BOOLEAN bstop = FALSE;
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UINT32 Data, MTxCycle, macStatus;
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if (bw != pAd->CommonCfg.BBPCurrentBW)
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bstop = TRUE;
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if (bstop)
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{
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/* Disable MAC Tx/Rx */
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RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Data);
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Data &= (~0x0C);
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RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Data);
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/* Check MAC Tx/Rx idle */
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for (MTxCycle = 0; MTxCycle < 10000; MTxCycle++)
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{
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RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &macStatus);
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if (macStatus & 0x3)
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RTMPusecDelay(50);
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else
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break;
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}
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}
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RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &old_val);
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val = (old_val & (~0x18));
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switch (bw)
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{
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case BW_20:
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val &= (~0x18);
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break;
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case BW_40:
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val |= (0x10);
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break;
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case BW_10:
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val |= 0x08;
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break;
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}
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if (val != old_val) {
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RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, val);
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}
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if (bstop)
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{
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/* Enable MAC Tx/Rx */
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RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Data);
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Data |= 0x0C;
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RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Data);
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}
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pAd->CommonCfg.BBPCurrentBW = bw;
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return TRUE;
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}
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INT rtmp_bbp_set_mmps(struct _RTMP_ADAPTER *pAd, BOOLEAN ReduceCorePower)
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{
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UCHAR bbp_val, org_val;
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RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &org_val);
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bbp_val = org_val;
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if (ReduceCorePower)
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bbp_val |= 0x04;
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else
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bbp_val &= ~0x04;
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if (bbp_val != org_val)
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RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, bbp_val);
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return TRUE;
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}
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NDIS_STATUS AsicBBPWriteWithRxChain(
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IN RTMP_ADAPTER *pAd,
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IN UCHAR bbpId,
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IN CHAR bbpVal,
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IN RX_CHAIN_IDX rx_ch_idx)
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{
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UCHAR idx = 0, val = 0;
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if (((pAd->MACVersion & 0xf0000000) < 0x28830000) ||
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(pAd->Antenna.field.RxPath == 1))
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{
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RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, bbpId, bbpVal);
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return NDIS_STATUS_SUCCESS;
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}
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while (rx_ch_idx != 0)
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{
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if (idx >= pAd->Antenna.field.RxPath)
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break;
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if (rx_ch_idx & 0x01)
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{
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RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R27, &val);
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val = (val & (~0x60)) | (idx << 5);
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#ifdef RTMP_MAC_USB
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if ((IS_USB_INF(pAd)) &&
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(RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R27, val) == STATUS_SUCCESS))
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{
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RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, bbpId, bbpVal);
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}
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#endif /* RTMP_MAC_USB */
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DBGPRINT(RT_DEBUG_INFO,
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("%s(Idx):Write(R%d,val:0x%x) to Chain(0x%x, idx:%d)\n",
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__FUNCTION__, bbpId, bbpVal, rx_ch_idx, idx));
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}
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rx_ch_idx >>= 1;
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idx++;
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}
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return NDIS_STATUS_SUCCESS;
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}
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NDIS_STATUS AsicBBPReadWithRxChain(
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IN RTMP_ADAPTER *pAd,
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IN UCHAR bbpId,
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IN CHAR *pBbpVal,
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IN RX_CHAIN_IDX rx_ch_idx)
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{
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UCHAR idx, val;
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if (((pAd->MACVersion & 0xffff0000) < 0x28830000) ||
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(pAd->Antenna.field.RxPath == 1))
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{
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RTMP_BBP_IO_READ8_BY_REG_ID(pAd, bbpId, pBbpVal);
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return NDIS_STATUS_SUCCESS;
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}
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idx = 0;
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while(rx_ch_idx != 0)
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{
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if (idx >= pAd->Antenna.field.RxPath)
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break;
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if (rx_ch_idx & 0x01)
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{
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val = 0;
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RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R27, &val);
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val = (val & (~0x60)) | (idx << 5);
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#ifdef RTMP_MAC_USB
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if ((IS_USB_INF(pAd)) &&
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(RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R27, val) == STATUS_SUCCESS))
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{
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RTMP_BBP_IO_READ8_BY_REG_ID(pAd, bbpId, pBbpVal);
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}
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#endif /* RTMP_MAC_USB */
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break;
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}
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rx_ch_idx >>= 1;
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idx++;
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}
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return NDIS_STATUS_SUCCESS;
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}
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INT rtmp_bbp_get_agc(struct _RTMP_ADAPTER *pAd, CHAR *agc, RX_CHAIN_IDX idx)
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{
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return AsicBBPReadWithRxChain(pAd, BBP_R66, agc, idx);
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}
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INT rtmp_bbp_set_agc(struct _RTMP_ADAPTER *pAd, UCHAR agc, RX_CHAIN_IDX idx)
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{
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return AsicBBPWriteWithRxChain(pAd, BBP_R66, agc, idx);
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}
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INT rtmp_bbp_set_filter_coefficient_ctrl(RTMP_ADAPTER *pAd, UCHAR Channel)
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{
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UCHAR bbp_val = 0, org_val = 0;
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if (Channel == 14)
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{
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/* when Channel==14 && Mode==CCK && BandWidth==20M, BBP R4 bit5=1 */
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RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &org_val);
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bbp_val = org_val;
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if (WMODE_EQUAL(pAd->CommonCfg.PhyMode, WMODE_B))
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bbp_val |= 0x20;
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else
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bbp_val &= (~0x20);
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if (bbp_val != org_val)
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RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, bbp_val);
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}
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return TRUE;
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}
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UCHAR rtmp_bbp_get_random_seed(RTMP_ADAPTER *pAd)
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{
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UCHAR value1, value2, value3, value4, value5;
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RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R50, &value1);
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RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R51, &value2);
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RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R52, &value3);
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RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R53, &value4);
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RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R54, &value5);
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return (value1^value2^value3^value4^value5);
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}
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INT rtmp_bbp_is_ready(struct _RTMP_ADAPTER *pAd)
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{
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INT idx = 0;
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UCHAR val;
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do
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{
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RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &val);
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if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))
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return FALSE;
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DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", val));
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} while ((++idx < 20) && ((val == 0xff) || (val == 0x00)));
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return (((val == 0xff) || (val == 0x00)) ? FALSE : TRUE);
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}
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#ifdef PRE_ANT_SWITCH
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#endif /* PRE_ANT_SWITCH */
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#ifdef CFO_TRACK
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#ifdef CONFIG_AP_SUPPORT
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INT rtmp_cfo_track(RTMP_ADAPTER *pAd, MAC_TABLE_ENTRY *pEntry, INT lastClient)
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{
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/* CFO Tracking */
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if (IS_RT3883(pAd))
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{
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if (pAd->MacTab.Size !=1 || pAd->CommonCfg.CFOTrack==0)
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{
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/* Set to default */
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RT3883_AsicSetFreqOffset(pAd, pAd->RfFreqOffset);
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}
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else if ((lastClient < MAX_LEN_OF_MAC_TABLE) && (lastClient >=1) &&
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pAd->CommonCfg.CFOTrack < 8 &&
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pEntry->freqOffsetValid)
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{
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/* Track CFO */
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SHORT foValue, offset = pEntry->freqOffset;
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UCHAR RFValue;
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RT30xxReadRFRegister(pAd, RF_R17, (PUCHAR)&RFValue);
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RFValue &= 0x7F;
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if (offset > 32)
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offset = 32;
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else if (offset < -32)
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offset = -32;
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foValue = RFValue - (offset/16);
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if (foValue < 0)
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foValue = 0;
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else if (foValue > 0x5F)
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foValue = 0x5F;
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if (foValue != RFValue)
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RT3883_AsicSetFreqOffset(pAd, foValue);
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/* If CFOTrack!=1 then keep updating until CFOTrack==8 */
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if (pAd->CommonCfg.CFOTrack != 1)
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pAd->CommonCfg.CFOTrack++;
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pEntry->freqOffsetValid = FALSE;
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}
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}
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return TRUE;
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}
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#endif /* CONFIG_AP_SUPPORT */
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#endif /* CFO_TRACK */
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#ifdef MT7601
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NDIS_STATUS MT7601_BBP_write(
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IN PRTMP_ADAPTER pAd,
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IN UCHAR regID,
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IN UCHAR value)
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{
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BBP_CSR_CFG_STRUC BbpCsr = { { 0 } };
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UINT i = 0;
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NDIS_STATUS ret;
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#ifdef MT7601FPGA
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return;
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#endif /*MT7601FPGA */
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if (pAd->WlanFunCtrl.field.WLAN_EN == 0)
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{
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DBGPRINT_ERR(("rlt_rf_write. Not allow to write BBP 0x%x : fail\n", regID));
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return STATUS_UNSUCCESSFUL;
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}
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#ifdef RTMP_MAC_USB
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if (IS_USB_INF(pAd)) {
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RTMP_SEM_EVENT_WAIT(&pAd->reg_atomic, ret);
|
|
if (ret != 0) {
|
|
DBGPRINT(RT_DEBUG_ERROR, ("reg_atomic get failed(ret=%d)\n", ret));
|
|
return STATUS_UNSUCCESSFUL;
|
|
}
|
|
}
|
|
#endif /* RTMP_MAC_USB */
|
|
|
|
ASSERT((regID <= pAd->chipCap.MaxNumOfBbpId));
|
|
|
|
ret = STATUS_UNSUCCESSFUL;
|
|
do
|
|
{
|
|
RTMP_IO_READ32(pAd, BBP_CSR_CFG, &BbpCsr.word);
|
|
|
|
if (!BbpCsr.field.Busy)
|
|
break;
|
|
i++;
|
|
}
|
|
while ((i < MAX_BUSY_COUNT) && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)));
|
|
|
|
if ((i == MAX_BUSY_COUNT) || (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
|
|
{
|
|
DBGPRINT_RAW(RT_DEBUG_ERROR, ("Retry count exhausted or device removed!!!\n"));
|
|
goto done;
|
|
}
|
|
|
|
BbpCsr.word = 0;
|
|
BbpCsr.field.fRead = 0;
|
|
BbpCsr.field.BBP_RW_MODE = 1;
|
|
BbpCsr.field.Busy = 1;
|
|
BbpCsr.field.Value = value;
|
|
BbpCsr.field.RegNum = regID;
|
|
|
|
|
|
RTMP_IO_WRITE32(pAd, BBP_CSR_CFG, BbpCsr.word);
|
|
|
|
ret = NDIS_STATUS_SUCCESS;
|
|
done:
|
|
|
|
|
|
#ifdef RTMP_MAC_USB
|
|
if (IS_USB_INF(pAd)) {
|
|
RTMP_SEM_EVENT_UP(&pAd->reg_atomic);
|
|
}
|
|
#endif /* RTMP_MAC_USB */
|
|
|
|
return ret;
|
|
}
|
|
|
|
|
|
NDIS_STATUS MT7601_BBP_read(
|
|
IN RTMP_ADAPTER *pAd,
|
|
IN UCHAR regID,
|
|
IN UCHAR *pValue)
|
|
{
|
|
BBP_CSR_CFG_STRUC BbpCsr = { { 0 } };
|
|
UINT i=0, k=0;
|
|
NDIS_STATUS ret = STATUS_UNSUCCESSFUL;
|
|
|
|
|
|
if (pAd->WlanFunCtrl.field.WLAN_EN == 0)
|
|
{
|
|
DBGPRINT_ERR(("MT7601_BBP_read. Not allow to read BBP 0x%x : fail\n", regID));
|
|
return STATUS_UNSUCCESSFUL;
|
|
}
|
|
|
|
#ifdef RTMP_MAC_USB
|
|
if (IS_USB_INF(pAd)) {
|
|
RTMP_SEM_EVENT_WAIT(&pAd->reg_atomic, i);
|
|
if (i != 0) {
|
|
DBGPRINT(RT_DEBUG_ERROR, ("reg_atomic get failed(ret=%d)\n", i));
|
|
return STATUS_UNSUCCESSFUL;
|
|
}
|
|
}
|
|
#endif /* RTMP_MAC_USB */
|
|
|
|
ASSERT((regID <= pAd->chipCap.MaxNumOfBbpId));
|
|
|
|
for (i=0; i<MAX_BUSY_COUNT; i++)
|
|
{
|
|
if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))
|
|
goto done;
|
|
|
|
RTMP_IO_READ32(pAd, BBP_CSR_CFG, &BbpCsr.word);
|
|
|
|
if (BbpCsr.field.Busy == BUSY)
|
|
continue;
|
|
|
|
BbpCsr.word = 0;
|
|
BbpCsr.field.fRead = 1;
|
|
BbpCsr.field.BBP_RW_MODE = 1;
|
|
BbpCsr.field.Busy = 1;
|
|
BbpCsr.field.RegNum = regID;
|
|
|
|
|
|
RTMP_IO_WRITE32(pAd, BBP_CSR_CFG, BbpCsr.word);
|
|
|
|
for (k=0; k<MAX_BUSY_COUNT; k++)
|
|
{
|
|
if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))
|
|
goto done;
|
|
|
|
RTMP_IO_READ32(pAd, BBP_CSR_CFG, &BbpCsr.word);
|
|
|
|
if (BbpCsr.field.Busy == IDLE)
|
|
break;
|
|
}
|
|
|
|
if ((BbpCsr.field.Busy == IDLE) &&
|
|
(BbpCsr.field.RegNum == regID) )
|
|
{
|
|
*pValue = (UCHAR)(BbpCsr.field.Value);
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (BbpCsr.field.Busy == BUSY)
|
|
{
|
|
DBGPRINT_ERR(("BBP read R%d=0x%X fail, i[%d], k[%d]\n", regID, BbpCsr.word,i,k));
|
|
goto done;
|
|
}
|
|
ret = STATUS_SUCCESS;
|
|
|
|
done:
|
|
#ifdef RTMP_MAC_USB
|
|
if (IS_USB_INF(pAd)) {
|
|
RTMP_SEM_EVENT_UP(&pAd->reg_atomic);
|
|
}
|
|
#endif /* RTMP_MAC_USB */
|
|
|
|
return ret;
|
|
}
|
|
|
|
|
|
#endif /* MT7601 */
|
|
|
|
#endif /* RTMP_MAC */
|
|
|